Semiconductor Industry Explained: Fab vs Fabless and India’s Mission

Quick Answer: A fab company (Intel, TSMC) owns chip factories and manufactures chips; a fabless company (NVIDIA, Qualcomm) only designs chips and outsources manufacturing. India has historically been strong in design but weak in fabrication — a gap the India Semiconductor Mission (ISM), launched in December 2021 with a Rs 76,000 crore outlay, aims to close. Approved projects include Tata’s Dholera fab, Micron’s Sanand ATP unit, and ISRO’s own Vikram-series chips from SCL Mohali.

In a Nutshell: What Are Semiconductors and Why India Is Racing to Make Chips

• Semiconductors (chips) power everything from smartphones and cars to satellites and missiles — they are the “oil of the digital economy”.
• The chip industry has three stages: design, fabrication (fab), and assembly-testing-packaging (ATP).
• India holds roughly 20% of the world’s chip design workforce but almost zero fabrication capacity — the ISM is designed to fix this imbalance.
• ISRO’s Semi-Conductor Laboratory (SCL), Mohali, has designed indigenous processors like the Vikram 3201 used in satellites and launch vehicles.
• The ISM, under MeitY, operates through schemes like DLI, SPECS and the Modified Semicon Programme 2024.

Semiconductor Basics: What the Chip Does and Why It Matters

A semiconductor is a material (usually silicon) that conducts electricity better than an insulator but worse than a metal. By adding tiny impurities (“doping”), engineers create switches called transistors. A modern chip packs billions of transistors on a thin slice of silicon called a wafer.

The size of transistors is measured in nanometres (nm) — a “node”. Smaller nodes mean faster, more power-efficient chips: a 5 nm chip is more advanced than a 28 nm chip. Cutting-edge fabs today work at 3–5 nm, while automotive and industrial chips often use mature 28–90 nm nodes — the segment India’s first fabs target.

The Semiconductor Value Chain: Design, Fabrication, ATP (Assembly, Testing, Packaging)

Three broad stages take a chip from idea to product:

1. Design: Architects use software (EDA tools) to create the chip’s circuit blueprint. India’s position: strong — most global firms run design centres here.
2. Fabrication: The design is printed layer-by-layer onto silicon wafers in a “fab”. India’s position: historically absent; now emerging via Dholera.
3. Assembly, Testing and Packaging (ATP/OSAT): Wafers are cut into individual dies, tested, and packaged into protective casings. India’s position: growing — Micron Sanand, CG Power-Renesas.

Design and fabrication contribute the highest value; ATP is labour- and capital-intensive but a realistic entry point.

Fab vs Fabless: Two Business Models Explained

TSMC (Taiwan) is the world’s largest pure-play foundry; NVIDIA designs the chip and TSMC builds it. India’s strategy pushes both models: building fabs while nurturing fabless startups through the DLI scheme.

Why Building a Fab Is So Hard and Expensive

• Capital intensity: An advanced fab costs $10–20 billion; even a mature-node fab runs into billions over years before revenue.
• Lithography machines: Extreme Ultraviolet (EUV) machines come almost exclusively from ASML (Netherlands), each costing over $150 million.
• Ultra-pure water and stable power: Fabs consume millions of litres of ultrapure water daily and need uninterrupted electricity — a single outage can ruin entire wafers.
• Talent: Requires specialised process engineers, a thin pipeline globally and thinner in India.
• Time: From announcement to first chip typically takes 3–5 years.

ISRO’s Indigenous Chips: From SAC’s NavIC Processors to Vikram 3201

ISRO’s Semi-Conductor Laboratory (SCL) at Mohali, Punjab, is India’s oldest chip fabrication facility. SCL fabricates chips on 180 nm technology — modest commercially, but adequate for space-grade electronics that prioritise radiation hardness and reliability over miniaturisation.

ISRO’s Space Applications Centre (SAC), Ahmedabad, designed the indigenous Vikram-series processors. The Vikram 3201, a 32-bit radiation-tolerant processor, powers navigation and control in satellites and launch vehicles, and processors for the NavIC (Indian regional navigation system) receivers have also been developed indigenously — a major step in aatmanirbharta for critical space electronics, since imported chips carry supply and security risks.

India Semiconductor Mission (ISM): Objectives and Structure

Launched in December 2021 with a financial outlay of Rs 76,000 crore, the ISM operates under the Ministry of Electronics and Information Technology (MeitY) as a dedicated division of the Digital India Corporation. Objectives include:

• Developing a sustainable semiconductor and display manufacturing ecosystem in India.
• Attracting large fabs, ATP/OSAT units, and component ecosystem players.
• Supporting domestic chip design startups (fabless ecosystem).
• Reducing import dependence — India imports nearly all its chips, worth billions of dollars annually.

In 2024, the Modified Programme for Development of Semiconductors and Display Manufacturing Ecosystem (“Modified Semcon Programme”) enhanced fiscal support: up to 50% of project cost for fabs and ATMP/OSAT units.

Key Schemes: PLI, DLI, SPECS and the Modified Semicon Programme

• PLI (Production Linked Incentive): 4–6% incentive on incremental sales for large-scale electronics manufacturing that uses semiconductors.
• DLI (Design Linked Incentive): Supports domestic fabless startups with up to 50% of design cost plus deployment incentives.
• SPECS: Provides financial incentives for manufacturing semiconductor and display manufacturing ecosystem components.
• Modified Semcon Programme 2024: Unified framework with up to 50% fiscal support for fabs, ATMP and OSAT projects.

Approved Projects: Dholera, Sanand, Jagiroad, and Morigaon

Verify latest details on the official portal at meity.gov.in and India Semiconductor Mission pages, or PIB releases at pib.gov.in.

India’s Design Strengths: Fabless Firms and Talent Pool

India accounts for roughly 20% of the global chip design workforce, with an estimated 1.25 lakh+ engineers working in VLSI (chip design) across Bengaluru, Hyderabad, Noida and Pune. Global capability centres (GCCs) of Texas Instruments, Intel, Qualcomm, AMD and ARM run large design operations here. Homegrown firms include Sasken Technologies, Signalchip (indigenous 4G/5G chipsets), and a growing DLI-backed startup ecosystem. Design is IP-rich and talent-driven — exactly where India already excels.

Challenges: Water, Power, Talent, Geopolitics and the China-Taiwan Factor

• Water and power: Fabs need enormous quantities of ultrapure water and 24×7 reliable electricity — Dholera’s location is chosen partly for its planned infrastructure.
• Talent gap: Design talent is abundant; fabrication process engineers are scarce and must be trained/imported.
• Geopolitics: Over 60% of global fabrication sits in Taiwan and South Korea; China-Taiwan tensions expose the world — and India — to supply-chain risk, which is also the strategic argument for ISM.
• Technology access: Advanced nodes depend on ASML’s EUV machines and protected IP; India’s fabs start at mature 28 nm+ nodes.
• Competition: Rival incentive schemes in the US (CHIPS Act), EU and Japan complicate attracting global players.

Exam Corner: One-Liner Facts, MCQs and Answer Keywords

MCQ (PYQ-style): The India Semiconductor Mission, launched in 2021 with a Rs 76,000 crore outlay, functions under which ministry? Answer keyword: Ministry of Electronics and IT (MeitY).

MCQ: Which company is setting up India’s first semiconductor ATP unit at Sanand? Answer keyword: Micron.

Conclusion: Glossary and Memory Hooks for Revision

• Wafer: thin silicon disc on which chips are fabricated.
• Node (nm): transistor size measure — smaller = more advanced.
• Fab: chip fabrication plant.
• Fabless: designs chips, doesn’t manufacture.
• Foundry: fab that manufactures for other companies.
• IDM: designs + manufactures (Intel).
• ATP/OSAT: assembly, testing, packaging of chips.
• EDA: software tools for chip design.
• EUV: extreme ultraviolet lithography for advanced chips.
• DLI: Design Linked Incentive scheme.

Mnemonics: “D-S-J” = Dholera, Sanand, Jagiroad (approved project sites). “76 in 21” = Rs 76,000 crore in 2021. “Vikram of Mohali” = ISRO’s chips from SCL Mohali.

Frequently Asked Questions

Q: What is the difference between fab and fabless companies?

Fab companies manufacture chips in their own fabrication plants (Intel, TSMC); fabless companies only design chips and outsource manufacturing (NVIDIA, Qualcomm).

Q: What is the budget of the India Semiconductor Mission?

Rs 76,000 crore outlay announced in December 2021, later enhanced under the Modified Semicon Programme 2024.

Q: Which is India’s first approved semiconductor fabrication plant?

Tata Electronics’ fab at Dholera, Gujarat, in partnership with Taiwan’s PSMC, approved in February 2024.

Q: Does ISRO make its own chips?

Yes — ISRO designs chips like the Vikram 3201 at its Semi-Conductor Laboratory, Mohali, used in satellites and launch vehicles.

Q: Where is Micron’s semiconductor plant in India?

Micron’s assembly, testing and packaging (ATP) unit is at Sanand, Gujarat, approved in 2023.

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