Semiconductor Mission Explained: ISM 2.0, Fab vs ATMP and India's Chip Design Push for Exams
Science & Technology10 min readSep 26, 2026

Semiconductor Mission Explained: ISM 2.0, Fab vs ATMP and India’s Chip Design Push for Exams

Semiconductor Mission Explained: ISM 2.0, Fab vs ATMP and India’s Chip Design Push for Exams
10 min read · 1,954 words

Semiconductor Mission ISM 2.0: Fab vs ATMP and India’s Chip Design Push Explained

Quick Answer: The India Semiconductor Mission (ISM) is the Government of India’s flagship programme to build a domestic semiconductor and display manufacturing ecosystem. Launched in December 2021 with a ₹76,000 crore outlay under MeitY, its upgraded phase ISM 2.0 (announced with Budget 2025-26) expands financial support to around ₹6,900 crore for the mission in 2025-26 within a wider research-and-development push, covering fabs, ATMP/OSAT units and chip design incentives.

In a Nutshell: What is the India Semiconductor Mission?

The India Semiconductor Mission (ISM) is a specialised and independent business division within the Digital India Corporation (DIC) that serves as the nodal agency for India’s comprehensive semiconductor and display ecosystem strategy. It was approved by the Union Cabinet in December 2021 with a financial outlay of ₹76,000 crore under the Ministry of Electronics and Information Technology (MeitY).

The mission has a fourfold objective: (i) build a sustainable semiconductor and display manufacturing ecosystem in India, (ii) enable an ecosystem of over 100 design companies, (iii) foster higher domestic value addition in electronics manufacturing, and (iv) reduce import dependence in a strategically critical sector. India imports nearly all its chips — worth roughly $15 billion annually — making self-reliance in semiconductors a core Atmanirbhar Bharat priority.

Why Semiconductors Matter: Prelims Basics of Chips and the Supply Chain

A semiconductor (or chip/integrated circuit) is a device made from silicon that controls the flow of electricity — the “brains” behind everything from smartphones and cars to missiles and data centres. Understanding the chip value chain is essential for prelims:

  • Design: The chip’s architecture and circuit layout are created using software tools (EDA tools). India already has a strong presence here.
  • Fabrication: Raw silicon is refined into cylindrical ingots, sliced into thin wafers, and processed in ultra-clean “fabs” where circuits are etched layer by layer using photolithography.
  • Packaging and testing: The finished wafer is cut into individual dies, which are assembled, tested, marked and packaged into usable chips — done at ATMP/OSAT facilities.

Globally, the supply chain is highly concentrated: Taiwan (TSMC) dominates advanced fabrication, the Netherlands (ASML) monopolises EUV lithography machines, and countries like China, Malaysia and Vietnam handle significant packaging work. This concentration is why chip diplomacy — and India’s entry into the fab business — is geopolitically significant.

ISM 1.0 (2021): Launch, Outlay and Four Scheme Components

Approved in December 2021, ISM 1.0 carried a total outlay of ₹76,000 crore and comprised four distinct schemes:

  1. Scheme for Setting up of Semiconductor Fabs in India — fiscal support of up to 50% of project cost for silicon wafer fabrication plants.
  2. Scheme for Setting up of Display Fabs — support for TFT LCD and OLED display manufacturing.
  3. Scheme for Setting up of Compound Semiconductors, ATMP/OSAT facilities — support for specialised semiconductors (SiC, GaN) and packaging units.
  4. Design Linked Incentive (DLI) Scheme — incentives and design infrastructure support for domestic chip design.

The nodal ministry is MeitY, and implementation happens through the ISM division under Digital India Corporation. Details are available on the official portal at ism.gov.in and meity.gov.in.

Fab vs ATMP vs OSAT: Clearing the Most Confused Exam Terms

These three terms appear interchangeably in news but mean very different things:

TermWhat it doesStage in value chainExample in India
Fab (Wafer Fabrication)Manufactures chips from silicon wafers; etches circuits onto wafers using photolithographyCore manufacturing — most capital-intensive (billions of dollars)Tata Electronics fab, Dholera, Gujarat
ATMPAssembly, Testing, Marking and Packaging — cuts wafers into dies and packages them into finished chipsDownstream of fabrication; less capital-intensiveCG Power–Renesas unit, Sanand
OSATOutsourced Semiconductor Assembly and Test — third-party packaging/testing services offered to multiple chipmakersSame as ATMP but as an outsourced service modelKaynes Technology unit, Jewar, UP

Remember for exams: fab = making the chip; ATMP/OSAT = finishing and packaging the chip. A country can be strong in ATMP without having fabs — India’s first phase focused on both.

2024-Approved Projects: Tata-Fabs, Tata-Panasonic, CG Power and Kaynes

In February–March 2024, the Union Cabinet approved four semiconductor projects worth over ₹1.26 lakh crore — the mission’s biggest milestone:

  • Tata Electronics–PSMC Fab, Dholera (Gujarat): India’s first commercial wafer fab, investment of about ₹91,000 crore, with technology from Taiwan’s Powerchip Semiconductor Manufacturing Corporation (PSMC). Chips for electric vehicles, telecom and consumer electronics.
  • Tata Electronics–Panasonic OSAT, Sanand (Gujarat): Assembly and testing unit in partnership with Japan’s Renesas and Taiwan’s PSMC, investment of about ₹7,600 crore.
  • CG Power–Renesas ATMP, Sanand (Gujarat): Investment of about ₹7,600 crore for packaging and testing of chips, mainly for automotive and industrial use.
  • Kaynes Technology OSAT, Jewar (Uttar Pradesh): Investment of about ₹3,300 crore — India’s first OSAT unit, for automotive, industrial and consumer chips.

Additionally, the Cabinet in February 2024 approved a Semiconductor Laboratory (SCL) modernisation at Mohali, transferring it from ISRO to MeitY for research and development purposes.

Design-Linked Incentive (DLI) Scheme and India’s Chip Design Push

The DLI scheme, launched in 2021 under ISM, targets the design end of the value chain, where India already possesses a deep talent pool — roughly 20% of the world’s chip design engineers are Indian. The scheme has two components:

  1. Product Design Linked Incentive: Up to 50% of eligible expenditure subject to a ceiling of ₹15 crore per application for developing semiconductor designs for domestic manufacturing.
  2. Deployment Linked Incentive: 6–4% of net sales turnover over five years for products manufactured in India and deployed in the market.

C-DAC (Centre for Development of Advanced Computing) implements the design infrastructure component, providing access to EDA tools, foundry nodes and prototyping support through facilities like the ChipIN Centre at C-DAC Bengaluru. Notable DLI-supported successes include Gujarat-based Sahasra Semiconductors and the indigenous DC-DC converter chip developed by an IIT Madras-incubated startup.

ISM 2.0 (2025): Key Changes, Outlay and Strategic Focus

The Union Budget 2025-26 announced the next phase of the India Semiconductor Mission with significant expansions. Key features of ISM 2.0:

  • Expanded allocation: ₹2,500 crore allocated to ISM in Budget 2025-26, alongside a ₹1 lakh crore Research, Development and Innovation (RDI) scheme to support deep-tech research, including semiconductors.
  • Widened scope: Proposals are invited afresh from potential investors under an expanded programme covering not only fabs and ATMP but also legacy/mature-node chips (28 nm and above) suited to automotive and industrial applications.
  • Higher fiscal support: Government funding support raised — for fabs using 28 nm or above, support goes up to 70% of project cost for units in the North-East, and up to 60% elsewhere; for ATMP/OSAT, up to 75% in the North-East and 65% elsewhere.
  • Streamlined approvals: A “fast-track” channel for faster approval of investment proposals.
  • Per-wafer incentive approach considered to reward actual production volumes.

Verification note: exact percentage slabs are as announced by MeitY in 2025; candidates should cross-check the latest figures at meity.gov.in and pib.gov.in closer to the exam.

Key Institutions and Bodies: MeitY, ISM Division, C-DAC, Semicon India

  • MeitY: Nodal ministry for the Semiconductor Mission and electronics policy.
  • ISM Division (Digital India Corporation): Independent business division implementing the mission, headed by a CEO reporting to MeitY.
  • C-DAC: Implements DLI design infrastructure; runs the ChipIN Centre for EDA tool access.
  • Semiconductor Laboratory (SCL), Mohali: India’s oldest fab facility, now under MeitY, being modernised.
  • Semicon India: Annual flagship conference (Semicon India 2024 held in Greater Noida; 2023 in Gandhinagar) organised with industry bodies to attract investment.

India’s Semiconductor Ecosystem: Strengths, Gaps and Global Comparisons

Strengths: A vast engineering talent pool (especially in chip design), a large and growing electronics consumption market, strong policy support (PLI schemes for electronics manufacturing complement ISM), and geopolitical positioning as a “China-plus-one” destination.

Gaps: No prior commercial fabrication experience until the Tata fab; dependence on foreign technology partners (PSMC, Renesas); scarcity of fab-grade ultrapure water, specialty chemicals and gases; and a long gestation period — the Dholera fab is expected to begin production around 2026-27.

Global comparison: Taiwan’s TSMC produces over 90% of the world’s most advanced chips; China invests heavily through its “Big Fund”. India’s realistic near-term strength lies in mature-node chips and design, not cutting-edge nodes — a nuance that scores well in mains answers.

Likely Prels Facts Table: Dates, Outlays, Plants and Acronyms

FactExam-Ready Answer
ISM launchDecember 2021 (Cabinet approval)
ISM 1.0 outlay₹76,000 crore
Nodal ministryMeitY
Implementing agencyISM Division under Digital India Corporation
Number of ISM schemesFour (Fabs, Display Fabs, Compound Semi/ATMP, DLI)
India’s first commercial fabTata Electronics–PSMC, Dholera, Gujarat (₹91,000 crore)
First OSAT unitKaynes Technology, Jewar, Uttar Pradesh
ATMP full formAssembly, Testing, Marking and Packaging
OSAT full formOutsourced Semiconductor Assembly and Test
DLI incentive ceilingUp to 50% of eligible expenditure (max ₹15 crore)
DLI implementing bodyC-DAC (design infrastructure)
ISM 2.0 announcedBudget 2025-26 (February 2025)
Semicon India conferenceAnnual event; 2024 edition in Greater Noida

Mains Angle: Semiconductor Mission and National Security, Jobs and Digital India

For GS-2/GS-3 mains, link the Semiconductor Mission to these analytical threads:

  • National security: Chips power defence systems, satellites and critical infrastructure; the chip shortage of 2021-22 exposed the strategic risk of import dependence — supply-chain resilience is now a core security doctrine.
  • Atmanirbhar Bharat and Digital India: Semiconductors underpin Digital Public Infrastructure (UPI, Aadhaar) and AI ambitions; domestic supply reduces vulnerability to export controls and geopolitical shocks.
  • Employment: The four approved 2024 projects are expected to create around 30,000 direct jobs and many more indirectly; design-linked work employs high-skilled engineers.
  • Geopolitics: India-US iCET and the India-EU Trade and Technology Council include semiconductor cooperation; India joined the US-led “Chip 4-adjacent” supply-chain dialogues as a trusted partner.
  • Challenges to highlight: Huge capital costs, technology partnerships, skilled fab technicians, water and power requirements, and competition from heavily subsidised rivals.

Previous-Year and Practice Questions on Semiconductors

Q1. With reference to the India Semiconductor Mission, consider the following statements: (1) It is implemented by the Ministry of Electronics and Information Technology. (2) It was launched in 2021 with an outlay of ₹76,000 crore. (3) ATMP units are involved in the fabrication of silicon wafers. Which are correct?

Answer: (1) and (2) only. ATMP units do packaging/testing, not wafer fabrication.

Q2. The term “OSAT”, sometimes seen in the news, stands for: (a) Optical Semiconductor Assembly Technique (b) Outsourced Semiconductor Assembly and Test (c) On-Site Advanced Testing (d) Organic Semiconductor and Thin-film

Answer: (b) Outsourced Semiconductor Assembly and Test.

Q3. India’s first approved commercial semiconductor fabrication plant is located in: (a) Sanand (b) Jewar (c) Dholera (d) Mohali

Answer: (c) Dholera, Gujarat (Tata Electronics–PSMC fab).

Q4. The Design Linked Incentive scheme provides product design-linked incentive of up to what percentage of eligible expenditure? (a) 25% (b) 40% (c) 50% (d) 70%

Answer: (c) 50% (ceiling ₹15 crore).

Frequently Asked Questions

Q: When was the India Semiconductor Mission launched and with what outlay?

The ISM received Cabinet approval in December 2021 with a total outlay of ₹76,000 crore. It is implemented by MeitY through the ISM division under the Digital India Corporation.

Q: How many semiconductor plants were approved under ISM in 2024?

Four projects were approved in February–March 2024: the Tata fab in Dholera, Tata-Panasonic OSAT in Sanand (with Renesas and PSMC), CG Power-Renesas ATMP in Sanand, and Kaynes OSAT in Jewar, Uttar Pradesh — a combined investment of over ₹1.26 lakh crore.

Q: What is the difference between a fab and an ATMP unit?

A fab manufactures chips from silicon wafers through photolithography and etching — the most capital-intensive step. An ATMP (Assembly, Testing, Marking and Packaging) unit takes the fabricated wafers, cuts them into individual dies, and assembles, tests and packages them into finished, usable chips.

Q: What is ISM 2.0?

ISM 2.0 is the successor phase of the Semiconductor Mission announced with Budget 2025-26. It widens the programme’s scope to legacy/mature-node chips, raises fiscal support (up to 70% for fabs in the North-East, 60% elsewhere; up to 75% for ATMP/OSAT in the North-East), introduces a fast-track approval route, and sits alongside the ₹1 lakh crore RDI scheme for deep-tech research. Verify exact current figures at pib.gov.in.

Q: Which ministry is the nodal ministry for the Semiconductor Mission?

The Ministry of Electronics and Information Technology (MeitY) is the nodal ministry.

Related reading

Quick revision

  • Design: The chip’s architecture and circuit layout are created using software tools (EDA tools). India already has a strong presence here.
  • Fabrication: Raw silicon is refined into cylindrical ingots, sliced into thin wafers, and processed in ultra-clean “fabs” where circuits are etched…
  • Packaging and testing: The finished wafer is cut into individual dies, which are assembled, tested, marked and packaged into usable chips — done at ATMP/OSAT facilities.
  • Scheme for Setting up of Semiconductor Fabs in India: — fiscal support of up to 50% of project cost for silicon wafer fabrication plants.
  • Scheme for Setting up of Display Fabs: — support for TFT LCD and OLED display manufacturing.
  • — support for specialised semiconductors (SiC, GaN) and packaging units.
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